CMOS Technology

The CMOS inverter stacks a PMOS (to $V_{DD}$) over an NMOS (to ground). For any steady input, one transistor is off, so almost no current flows. Power is consumed mainly when switching:

$P_{dyn} = \alpha\, C\, V_{DD}^2\, f$

This is why lowering the supply voltage saves power quadratically and why chips run hotter at higher clock speeds. CMOS inputs are high-impedance: never leave them floating — tie unused inputs high or low.