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UPEEC

Analog to Digital Converters

ADCs measure a voltage and turn it into a number — resolution, sampling and common architectures.

Intermediate
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An NN-bit ADC with reference VrefV_{ref}:

code=⌊VinVref×2N⌋LSB=Vref2N\text{code} = \left\lfloor \frac{V_{in}}{V_{ref}} \times 2^N \right\rfloor \qquad \text{LSB} = \frac{V_{ref}}{2^N}

A 12-bit ADC with 3.3 V reference resolves 3.3/4096 ≈ 0.8 mV. The quantisation noise limits the ideal SNR to:

SNR≈6.02N+1.76 dB\text{SNR} \approx 6.02N + 1.76\ \text{dB}

Architectures:

  • SAR — moderate speed and resolution (most microcontrollers).
  • Sigma-delta — high resolution (16–24 bit), slower (scales, audio).
  • Flash — fastest, low resolution (oscilloscopes).
  • Pipeline — high speed with good resolution.

Sample at more than twice the highest signal frequency (see Signals → Sampling Theorem) and add an anti-aliasing filter.

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