CAN Bus
A robust differential bus for cars and industry with message priorities and built-in error handling.
CAN uses a twisted pair (CAN_H, CAN_L) terminated with 120 Ω at each end. Logic 0 is dominant, 1 is recessive, so when nodes transmit at once, the message with the lowest ID wins arbitration without corrupting data.
A classic frame carries an 11-bit (or 29-bit extended) ID and up to 8 data bytes, protected by a CRC. Nodes that produce too many errors disconnect themselves (bus-off). CAN FD allows 64-byte payloads and faster data phases.
Microcontrollers need a CAN controller (many STM32s and ESP32 include one) plus a transceiver chip (TJA1050, SN65HVD230).
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