Parameters and Generics
Make modules configurable: `parameter WIDTH = 8` (Verilog) / `generic (WIDTH : integer := 8)` (VHDL).
Easy
One FIFO module serves every width and depth.
Spotted a mistake or want to add detail? Suggest an improvement — Content Contributors' edits are reviewed by editors before they go live.
Discussion (0)
Sign in or join free to ask questions and discuss this topic.